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| DM74ALS564A Octal D-Type Edge-Triggered Flip-Flop with September 1986 Revised February 2000 DM74ALS564A Octal D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs General Description These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight flip-flops of the DM74ALS564A are edge-triggered inverting D-type flip-flops. On the positive transition of the clock, the Q outputs will be set to the complement of the logic states that were set up at the D inputs. A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly. The output control does not affect the internal operation of the flip-flops. That is, the old data can be retained or new data can be entered even while the outputs are OFF. Features s Switching specifications at 50 pF s Switching specifications guaranteed over full temperature and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL process s 3-STATE buffer-type outputs drive bus lines directly Ordering Code: Order Number DM74ALS564AWM DM74ALS564AN Package Number M20B N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Connection Diagram (c) 2000 Fairchild Semiconductor Corporation DS006225 www.fairchildsemi.com DM74ALS564A Function Table Output Control L L L H L = LOW State H = HIGH State X = Don't Care = Positive Edge Transition Z = High Impedance State Q0 = Previous Condition of Q Logic Diagram D Output Q L X H L X X L H Q0 Z Clock www.fairchildsemi.com 2 DM74ALS564A Absolute Maximum Ratings(Note 1) Supply Voltage Input Voltage Voltage Applied to Disabled Output Operating Free Air Temperature Range Storage Temperature Range Typical JA N Package M Package 56.0C/W 75.0C/W 7V 7V 5.5V 0C to +70C -65C to +150C Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL fCLOCK tW tSU tH TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Clock Frequency Width of Clock Pulse Data Setup Time (Note 3) Data Hold Time (Note 3) Free Air Operating Temperature HIGH LOW 0 14 14 15 0 0 70 Parameter Min 4.5 2 0.8 -2.6 24 30 Nom 5 Max 5.5 Units V V V mA mA MHz ns ns ns ns C Note 2: This product meets application requirements of 500 temperature cycles from -65C to +150C. Note 3: The () arrow indicates the positive edge of the Clock is used for reference. Electrical Characteristics over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25C. Symbol VIK VOH Parameter Input Clamp Voltage HIGH Level Output Voltage VOL II IIH IIL IO IOZH IOZL ICC LOW Level Output Voltage Input Current @ Maximum Input Voltage HIGH Level Input Current LOW Level Input Current Output Drive Current OFF-State Output Current HIGH Level Voltage Applied OFF-State Output Current LOW Level Voltage Applied Supply Current VCC = 4.5V VIL = VILMax VCC = 4.5V to 5.5V VCC = 4.5V VIH = 2V VCC = 5.5V, VIH = 7V VCC = 5.5V, VIH = 2.7V VCC = 5.5V, VIL = 0.4V VCC = 5.5V, VO = 2.25V VCC = 5.5V, VIH = 2V VO = 2.7V VCC = 5.5V, VIH = 2V VO = 0.4V VCC = 5.5V Outputs OPEN Outputs HIGH Outputs LOW Outputs Disabled 10 15 16 -30 Conditions VCC = 4.5V, II = -18 mA IOH = Max IOH = -400 A IOL = 12 mA IOL = 24 mA 2.4 VCC - 2 0.25 0.35 0.4 0.5 0.1 20 -0.2 -112 20 -20 18 24 30 3.2 Min Typ Max -1.2 Units V V V V V mA A mA mA A A mA mA mA 3 www.fairchildsemi.com DM74ALS564A Switching Characteristics over recommended operating free air temperature range Symbol fMAX tPLH tPHL tPZH tPZL tPHZ tPLZ Parameter Maximum Clock Frequency Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Output Enable Time to HIGH Level Output Output Enable Time to LOW Level Output Output Disable Time from HIGH Level Output Output Disable Time from LOW Level Output Conditions VCC = 4.5V to 5.5V RL = 500 CL = 50 pF Clock Any Q From To Min 30 4 14 Max Units MHz ns Clock Output Control Output Control Output Control Output Control Any Q 4 14 ns Any Q 4 18 ns Any Q 4 18 ns Any Q 2 10 ns Any Q 3 15 ns www.fairchildsemi.com 4 DM74ALS564A Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com DM74ALS564A Octal D-Type Edge-Triggered Flip-Flop with Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com |
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